brunodu31

Possible clue regarding Error 80 (CAN communication failed) on parallel Voltronic inverters
Hello everyone,
I would like to share my experience regarding the infamous Error 80 (CAN communication failed) on two Voltronic inverters operating in single-phase parallel mode.
For several weeks I experienced random Error 80 faults. Sometimes the system would run for more than 30 hours without any issue, while other times it would fail after only one hour. The failures occurred under very different load conditions (from almost no load to more than 6 kW), so I could not correlate the problem with output power.
To investigate the issue, I developed a crash recorder that continuously stores the previous minute of operating data and automatically saves it whenever the AC output is lost. I analyzed several crash files.
The most common sequence was:
both inverters operating normally in Battery mode (QMOD = B),
one inverter suddenly switching to Standby (QMOD = S),
the second inverter remaining in Battery mode and supplying the load alone,
a few seconds later both inverters entering Fault mode (QMOD = F) with Error 80 (CAN communication failed).
Interestingly, the crashes often occurred when the two PV arrays were producing very different power levels.
My installation has two independent PV arrays:
same number of panels,
but different physical locations,
one array becomes partially shaded before the other because of a nearby building.
As a result, during the morning and evening transitions, one inverter can produce significantly less PV power than the other.
Before changing any inverter settings, I also implemented all the recommendations suggested by Coulomb regarding the inverter configuration. These changes did not eliminate Error 80, but they clearly improved the overall quality of the installation.
For example, before applying those recommendations, I had an audible high-frequency buzz in my computer speakers whenever the inverter was operating. After applying the recommended settings, that noise disappeared completely, suggesting that the inverter output waveform became cleaner, with fewer harmonics or less electrical interference. Although this did not solve Error 80, it definitely improved the electrical behaviour of the system.
While reviewing the documentation, I noticed something that caught my attention.
Both inverters were configured with:
Program 28 = PAL
Program 30 = ONE
The official parallel installation guide recommends Program 30 = ALL for parallel operation.
I therefore changed only one parameter:
Program 30: ONE → ALL
Nothing else was modified:
same firmware,
same batteries,
same CAN cables,
same parallel cards,
same supervisory software.
Since making this change, the system has now completed two full day/night cycles without a single Error 80.
These cycles included:
sunrise transition,
battery charging,
full PV production,
heavy loads (air conditioning and an approximately 2 kW angle grinder),
afternoon shading of one PV array,
sunset transition,
overnight operation.
Previously, these transition periods were exactly when Error 80 occurred most frequently.
At this point I cannot claim that Program 30 is the definitive solution. Two successful cycles are obviously not enough to prove causality.
However, the improvement is significant enough that I believe this parameter deserves attention, especially on installations where the two PV arrays do not receive identical solar irradiation throughout the day.
Has anyone else tested Program 30 = ALL instead of ONE on a parallel installation?
I would be very interested to know whether other users have observed a similar improvement.

Dear all

After studying the service manual, the internal board layout, the Voltronic SOP, and several teardown pictures, we have developed a working hypothesis regarding the intermittent Error 80 observed on some parallel Axpert/Voltronic 5048MG units.
The original Voltronic SOP only addresses LCD flickering by repositioning the MPPT choke wires. However, after a closer analysis of the inverter architecture, we believe the root cause may be broader than the LCD issue.
The MPPT choke is physically mounted far away from the MPPT power board. The two wires connecting the choke to the MPPT board (P2/P3) are relatively long and appear to be part of the MPPT switching current loop. These wires carry high current and high dV/dt switching waveforms generated by the MPPT IGBTs/MOSFETs operating at approximately 50 kHz.
While the toroidal choke itself should radiate very little magnetic field, the long connecting wires form a large switching loop that is likely to generate both conducted and radiated EMI. Inspection of the inverter shows that these wires run very close to several ribbon cables and communication boards, including boards associated with the parallel system (PAR-P board, PAR communication board, communication board and main board).
Our hypothesis is that the switching loop radiates broadband EMI which couples into the nearby ribbon cables and communication circuits. The fundamental switching frequency is only around 50 kHz, but the fast switching edges generate harmonics extending into the MHz range. This may occasionally corrupt communication between the parallel control boards, resulting in Error 80.
To investigate this theory, we will first implement the official Voltronic capacitor modification (2.2 µF film capacitor across PV+ and PV−), which should improve differential-mode filtering on the PV input.
If the problem persists, we plan to shield the two MPPT choke wires. The proposed design is intended to minimize additional capacitance:
each MPPT wire will be routed inside its own PVC insulating tube;
the two tubes will be placed side by side;
a copper braided shield will surround both tubes;
an outer heat-shrink sleeve will provide mechanical protection;
the shield will be connected to chassis earth at one end only;
significant air spacing will remain between the conductors and the shield in order to keep conductor-to-shield capacitance as low as possible (estimated only a few tens of pF).
The objective is not to filter the MPPT current itself, but to contain the radiated electric field generated by the switching loop and prevent coupling into the nearby communication and parallel-control circuitry.
At this stage this remains a hypothesis, but it is consistent with:
the physical layout of the inverter;
the location of the MPPT choke wiring;
the proximity of the communication ribbon cables;
the Voltronic LCD flicker correction;
and the intermittent nature of Error 80.