Jump to content

BritishRacingGreen

Members
  • Posts

    1,334
  • Joined

  • Last visited

  • Days Won

    17

BritishRacingGreen last won the day on October 10 2023

BritishRacingGreen had the most liked content!

Profile Information

  • Location
    Germiston
  • Interests
    Embedded hardware/software , Linux , ARM CPU , railway signaling and solar.

Recent Profile Visitors

3,723 profile views

BritishRacingGreen's Achievements

  1. Yes it has Because you may only anchor the neatral to earth at one point. Amongst other reasons why, a bonded neatral down stream will cause an upstream ELD to trip. When grid is available then the inverter output enjoys the neatral that is bonded somewhere on the upstream grid. But if grid is not available anymore, no gaurentees are met that the neutral is still bonded. Therefore the inverter control a bonding relay to reconstruct this important bond. Its important because no bond = ELD cannot trip when needed.
  2. Code 09 suggest you have an Axpert type of inverter, but that is speculatiion. 400vdc Pv voltage suggest it is a high voltage pv machine eg MKS3 or upwards (kodak), but that is speculation. Can you perhaps send us detail on your machine?
  3. Ok its old enough to have a 12v/-12v rail supply problem. Are you equipped to open up and measure?
  4. When you say 'exist' do mean the pv is present on the input terminals only, or do you mean that the inverter is actually using pv power but it is not on display? When you say '0' do you mean zero voltage or zero current or both?
  5. The sources are not complicated to understand , but we will discuss this further on this thread in hopefully good time. There are basically two subsystems : 1. A uart driven Rs485 comms module that handles the JBD connection . The important metrics are extracted and exported as public variables. 2. A canbus module that produces periodic canbus messages in Pylontech format . The JBD global variables are packed accordingly in the pylon can frames. The canbus is a PIO driven implementation from Kevin O Connor called can2040 . I have allocated this canbus driver on core 1 of the pico , and everything else on core 0. The jury is still out on my arbitration logic that I have implemented in the inter_core_comms.c file . However I am busy upgrading this by using hardware spinlocks instead of a tedious hardware fifo . However the current implementation works and this snapshot is currently in use at 3 sites. I am also currently busy with a command line interface (CLI) in order for the user to alter default setting to flash. This is controlled from a terminal app eg putty or realterm. The cli also provides diagnostic info to insist system integration. At the moment there is minimal diagnostic data produced via usb stdio connection to your laptop. Therefore you will notice a USb CDC serial port being enumareated on windows when you plug the usb cable to the laptop. You can configure a serial terminal at 115200 baud , and notice that the following messages will be printed every 500mS or so:
  6. Hi @DeonBez Attach is the source code , although not the latest , it is the last good known issue. This is a cmake configuration . So the sources are compiled from command line . The sources are Raspberry Pi Pico baremetal C and supported by the standard C/C++ SDK for Pico . The SDK can can be downloaded from Pi website and installation is easy via git. The project is cmake and very easy to build . The only dependancy is the SDK itself as mentioned and you must set an environmental variable in command line to point to the sdk folder. on my linux system the variable is set as follows : PICO_SDK_PATH=/home/antonr/rpi_pico/pico-sdk . This means the cmake project expects env variable PICO_SDK_PATH to be set to the sdk folder. Once you have set the env variable you can unzip the project zip file into any folder of your choice . The following build steps are required : unzip jbd_485_pyl_can_pc_ver_1_00_2023_09_19.zip cd jbd_485_pyl_can_pc_ver_1_00_2023_09_19 mkdir build cd build cmake .. make After successful compilation will your .UF2 firmware file be available in the build directory. jbd_485_pyl_can_pc_ver_1_00_2023_09_19.zip
  7. Hi Andrew , sorry to hear about your failure . I have documented the manual control of bus soft start previously as shown below : I have highlighted the word of WARNING in bold .
  8. That is too high, yes. EDIT : apologies I was confused with the KA3525 PWM output. Yes 100khz is about right. The period for the main SMPS UC3845 is measured at about 10.8 uS by me in the past, so that equates to just short of 100khz. Furthermore, duty cycle can be very low, as low as 800nS. See oscilloscope below: Here is an example of the output of the secondary side of the flyback transformer. The 'on' period here is typically 2 to 4 uS when the rail outputs are under load. This output is also distributed on the main board as an ac input for dc-dc isolation supply xformers.
  9. This failure been well documented in the "repair of Axperts : a Journey Started'. The excessive heat on the 7912 heatsink is probably due to the SG3525 PWM 16 pin DIL IC running hot.
  10. yes , that is the main reason for the pico microcontroller. The DC-AC full bridge must be controlled from first principles via this pico in order to test the igbt switching. In the same manner will I individually switch the DC-DC mosfets and igbts on the new 5kW designs. I am currently developing a command line interface to control the pico controller from a serial terminal . So you can for example inject a test pulse onto an igbt of arbitrary duration in order to verify that the frequency response of the mosfet/igbt driver is compliant. So the pico will actually emulate the working of the 3525 pwm ic.
  11. agree with you here . All I can add is I have seen on most 5kW boards that I worked on , that the two filter components are not fitted. The one that had it fitted caused severe short on -12V when I replaced the old SG3525 with a new one .
  12. ok it is possible I have subsequently found a solution as described in the following link :
×
×
  • Create New...